Jaehyung Ahn

Jaehyung Ahn

Current: Staff researcher in SAIT (May. 2019 ~ )

Contact: jh2ekd_at_gmail.com

Research Experiences

  • AI Systems Architecture and Performance Modeling: Design and performance modeling of distributed LLM serving systems, focusing on architectural trade-offs, workload characterization, system bottlenecks, and performance-driven design-space exploration.
  • Simulation-Based Performance Modeling and System Evaluation: Analytical and simulation-based evaluation of computing architectures to characterize workload behavior, identify performance bottlenecks, and assess system-level design trade-offs.
  • Memory, Storage, and CPU Architecture: Performance modeling and optimization of SSDs, multi-tier storage systems, and memory-management mechanisms, including irregular SSD behavior prediction and cache partitioning.
  • Distributed AI Training and Optimization: Performance optimization of large-scale AI training workloads through load balancing, communication–computation overlap, and efficient accelerator utilization.
  • Distributed Computing and Accelerator-Centric Architecture: Hardware–software co-design of scalable, device-centric server architectures and flexible device-control mechanisms for heterogeneous computing systems.

Publications

Google Scholar

  • DCS: a fast and scalable device-centric server architecture, Micro 2015
    • Jaehyung Ahn, Dongup Kwon, Youngsok Kim, Mohammadamin Ajdari, Jaewon Lee, Jangwoo Kim
  • DCS-ctrl: a fast and flexible device-control mechanism for device-centric server architecture, ISCA 2018
    • Dongup Kwon, Jaehyung Ahn, Dongju Chae, Mohammadamin Ajdari, Jaewon Lee, Suheon Bae, Youngsok Kim, Jangwoo Kim
  • SSDcheck: Timely and accurate prediction of irregular behaviors in black-box ssds, Micro 2018
    • Joonsung Kim, Pyeongsu Park, Jaehyung Ahn, Jihun Kim, Jangwoo Kim, Jong Kim
  • DTStorage: Dynamic tape-based storage for cost-effective and highly-available streaming service, CCGrid 2016
    • Jaewon Lee, Jaehyung Ahn, Choongul Park, Jangwoo Kim
  • Enforcing Last-level Cache Partitioning through Memory Virtual Channels, PACT 2019
    • Jongwook Chung, Yuhwan Ro, Joonsung Kim, Jaehyung Ahn, Jangwoo Kim, John Kim, Jae W. Lee, Jung Ho Ahn
  • Breaking MLPerf Training: A Case Study on Optimizing BERT, Arxiv
    • Yongdeok Kim, Jaehyung Ahn, Myeongwoo Kim, Changin Choi, Heejae Kim, Narankhuu Tuvshinjargal, Seungwon Lee, Yanzi Zhang, Yuan Pei, Xiongzhan Linghu, Jingkun Ma, Lin Chen, Yuehua Dai, Sungjoo Yoo
  • ServeTwin: A Benchmark-Validated Simulator for Distributed LLM Architecture Exploration, arXiv
    • Sungjoon Park, Changue Jung, Kyungno Joo, Mincheol Kang, Jaehyung Ahn, Sehwan Lee, Sangjoon Kim

Education

  • Mar. 2013 ~ Feb. 2019: Ph.D in Computer Science and Engineering, POSTECH, Korea.
  • Mar. 2009 ~ Feb. 2013: B.S. in Computer Science and Engineering, POSTECH, Korea.

Awards

  • 2nd place as a member of PLUS, CODEGATE 2011 Capture The Flag Apr 2011
  • 3rd place as a member of Kaist@postech, DEF CON 18 Capture The Flag Aug 2010

DEF CON and CODEGATE are the most prestigious international hacking competitions. I joined the team and reverse engineered binaries, decrypted ciphers, and exploited & patched vulnerabilities.

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